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MOSEL VITELIC
V62C5181024 128K X 8 STATIC RAM
PRELIMINARY
Features
s High-speed: 35, 70 ns s Ultra low DC operating current of 5mA (max.) TTL Standby: 5 mA (Max.) CMOS Standby: 60 A (Max.) s Fully static operation s All inputs and outputs directly compatible s Three state outputs s Ultra low data retention current (VCC = 2V) s Single 5V 10% Power Supply
s Packages - 32-pin TSOP (Standard) - 32-pin 600 mil PDIP - 32-pin 440 mil SOP (525 mil pin-to-pin)
Description
The V62C5181024 is a 1,048,576-bit static random-access memory organized as 131,072 words by 8 bits. It is built with MOSEL VITELIC's high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.
Functional Block Diagram
A0 Row Decoder 1024 x 1024 Memory Array VCC GND
A9
I/O0 Input Data Circuit I/O7 A10 CE1 CE2 OE WE
Column I/O Column Decoder
A16
Control Circuit
5181024 01
Device Usage Chart
Operating Temperature Range 0C to 70 C -40C to +85C Package Outline T * * W * * P * * Access Time (ns) 35 * * 70 * * L * * Power LL * * Temperature Mark Blank I
V62C5181024 Rev. 2.2 February 2000
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MOSEL VITELIC
Pin Descriptions
A0-A16 Address Inputs These 17 address inputs select one of the 128K x 8 bit segments in the RAM. CE1, CE2 Chip Enable Inputs CE1 is active LOW and CE2 is active HIGH. Both chip enables must be active to read from or write to the device. If either chip enable is not active, the device is deselected and is in a standby power mode. The I/O pins will be in the high-impedance state when deselected. Output Enable Input OE The Output Enable input is active LOW. When OE is LOW with CE LOW and WE HIGH, data of the selected memory location will be available on the I/O pins. When OE is HIGH, the I/O pins will be in the high impedance state.
V62C5181024
WE Write Enable Input An active LOW input, WE input controls read and write operations. When CE and WE inputs are both LOW, the data present on the I/O pins will be written into the selected memory location. I/O0-I/O7 Data Input and Data Output Ports These 8 bidirectional ports are used to read data from and write data into the RAM. VCC GND Power Supply Ground
Pin Configurations (Top View) 32-Pin DIP/SOP
NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
5181024 02
32-Pin TSOP (Standard)
VCC A15 CE2 WE A13 A8 A9 A11 OE A10 CE1 I/O7 I/O6 I/O5 I/O4 I/O3
A11 A9 A8 A13 WE CE2 A15 VCC NC A16 A14 A12 A7 A6 A5 A4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
5181024 03
OE A10 CE1 I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2 A3
V62C5181024 Rev. 2.2 February 2000
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MOSEL VITELIC
Part Number Information
V
MOSEL-VITELIC MANUFACTURED
V62C5181024
62
C
51
8
1024
-
TEMP.
SRAM FAMILY
OPERATING VOLTAGE
DENSITY PWR. 1024K SPEED 35 ns 70 ns
PKG
BLANK = 0C to 70C I = -40C to +85C
62 = STANDARD C = CMOS PROCESS 51 = 5V
T = TSOP STANDARD P = 600 mil PDIP W = 440 mil SOP (525 mil pin-to-pin)
ORGANIZATION 8 = 8-bit L = LOW POWER LL = LOW LOW POWER
5181024 05
Absolute Maximum Ratings (1)
Symbol
VCC VN VDQ TBIAS TSTG
Parameter
Supply Voltage Input Voltage Input/Output Voltage Applied Temperature Under Bias Storage Temperature
Commercial
-0.5 to +7 -0.5 to +7 VCC + 0.5 -10 to +125 -55 to +125
Industrial
-0.5 to +7 -0.5 to +7 VCC + 0.5 -65 to +135 -65 to +150
Units
V V V C C
NOTE: 1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Capacitance*
TA = 25C, f = 1.0MHz
Symbol CIN COUT Parameter Input Capacitance Output Capacitance Conditions VIN = 0V VI/O = 0V Max. 6 8 Unit pF pF
Truth Table
Mode
Standby Standby Output Disable Read Write
CE1
H X L L L
CE2
X L H H H
OE
X X H L X
WE
X X H H L
I/O Operation
High Z High Z High Z DOUT DIN
NOTE: 1. This parameter is guaranteed and not tested.
NOTE: X = Don't Care, L = LOW, H = HIGH
V62C5181024 Rev. 2.2 February 2000
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MOSEL VITELIC
DC Electrical Characteristics (over all temperature ranges, VCC = 5V 10%)
Symbol
VIL VIH IIL IOL VOL VOH
V62C5181024
Parameter
Input LOW Voltage(1,2) Input HIGH Voltage(1) Input Leakage Current Output Leakage Current Output LOW Voltage Output HIGH Voltage
Test Conditions
Min.
-0.5 2.2
Typ.
-- -- -- -- -- --
Max.
0.8 6 5 5 0.4 --
Units
V V A A V V
VCC = Max, VIN = 0V to VCC VCC = Max, CE1 = VIH, VOUT = 0V to VCC VCC = Min, IOL = 2.1mA VCC = Min, IOH = -1mA
-5 -5 -- 2.4
Symbol
ICC
Parameter
Operating Power Supply Current, CE1 = VIL, CE2 = VIH, Output Open, VCC = Max., f = 0 Read
Power
L LL Write L LL
Com.(4)
4 3 30 25 80 75
Ind.(4)
6 5 35 30 90 85 6 5 80 60
Units
mA
ICC1
Average Operating Current, CE1 = VIL, CE2 = VIH, Output Open, VCC = Max., f = fMAX(3) TTL Standby Current CE1 VIH, CE2 VIL, VCC = Max. CMOS Standby Current, CE1 VCC - 0.2V, CE2 0.2V, VIN VCC - 0.2V or VIN 0.2V, VCC = Max.
35ns 70ns L LL L LL
mA
ISB
4 3 60 50
mA
ISB1
A
NOTES: 1. These are absolute values with respect to device ground and all overshoots due to system or tester noise are included. 2. VIL (Min.) = -3.0V for pulse width < 20ns. 3. fMAX = 1/tRC. 4. Maximum values.
AC Test Conditions
Input Pulse Levels Input Rise and Fall Times Timing Reference Levels Output Load 0 to 3V 5 ns 1.5V see below
Key to Switching Waveforms
WAVEFORM INPUTS MUST BE STEADY MAY CHANGE FROM H TO L OUTPUTS WILL BE STEADY WILL BE CHANGING FROM H TO L WILL BE CHANGING FROM L TO H CHANGING: STATE UNKNOWN CENTER LINE IS HIGH IMPEDANCE "OFF" STATE
AC Test Loads and Waveforms
+5V 1800 I/O Pins 990 CL = 30 pF*
DON'T CARE: ANY CHANGE PERMITTED DOES NOT APPLY MAY CHANGE FROM L TO H
* Includes scope and jig capacitance
5181024 06
V62C5181024 Rev. 2.2 February 2000
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MOSEL VITELIC
Data Retention Characteristics
Symbol
VDR ICCDR
V62C5181024
Parameter
VCC for Data Retention CE1 VCC - 0.2V, CE2 0.2V, VIN VCC - 0.2V, or VIN 0.2V Com'l
Power
Min.
2.0
Typ.(2)
--
Max.
5.5
Units
V A
Data Retention Current CE1 VDR -0.2V, CE2 0.2V, VIN VCC - 0.2V, or VIN 0.2V
L LL
-- -- -- -- 0 tRC(1)
2 2 -- 4 -- --
50 40 100 60 -- --
Ind.
L LL
tCDR tR
Chip Deselect to Data Retention Time Operation Recovery Time (see Retention Waveform)
ns ns
NOTES: 1. tRC = Read Cycle Time 2. TA = +25C.
Low VCC Data Retention Waveform (1) (CE1 Controlled)
Data Retention Mode VCC 4.5V tCDR CE1 2.2V CE1 VCC - 0.2V VDR 2V tR 2.2V
5181024 07
4.5V
Low VCC Data Retention Waveform (2) (CE2 Controlled)
Data Retention Mode VCC 4.5V tCDR CE2 2.2V CE2 0.2V VDR 2V tR 2.2V
5181024 08
4.5V
V62C5181024 Rev. 2.2 February 2000
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MOSEL VITELIC
AC Electrical Characteristics
(over all temperature ranges) Read Cycle
Parameter Name
tRC tAA tACS1 tACS2 tOE tCLZ1 tCLZ2 tOLZ tCHZ tOHZ tOH
V62C5181024
-35 Parameter
Read Cycle Time Address Access Time Chip Enable Access Time Chip Enable Access Time Output Enable to Output Valid Chip Enable to Output in Low Z Chip Enable to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z Output Hold from Address Change
-45 Min.
45 -- -- -- -- 5 5 5 0 0 3
-55 Min.
55 -- -- -- -- 7 7 5 0 0 3
-70 Min.
70 -- -- -- -- 10 10 5 0 0 3
Min.
35 -- -- -- -- 3 3 5 0 0 3
Max.
-- 35 35 35 10 -- -- -- 10 10 --
Max.
-- 45 45 45 20 -- -- -- 15 15 --
Max.
-- 55 55 55 25 -- -- -- 20 20 --
Max.
-- 70 70 70 35 -- -- -- 25 25 --
Unit
ns ns ns ns ns ns ns ns ns ns ns
Write Cycle
Parameter Name
tWC tCW1 tCW2 tAS tAW tWP tWR tWHZ tWLZ tDW tDH
-35 Parameter
Write Cycle Time Chip Enable to End of Write Chip Enable to End of Write Address Setup Time Address Valid to End of Write Write Pulse Width Write Recovery Time Write to Output High-Z Write to Output Low Z Data Setup to End of Write Data Hold from End of Write
-45 Min.
45 35 35 0 35 35 0 0 5 25 0
-55 Min.
55 50 50 0 45 40 0 0 5 25 0
-70 Min.
70 60 60 0 60 50 0 0 5 30 0
Min.
35 25 25 0 25 25 0 0 3 20 0
Max.
-- -- -- -- -- -- -- 10 -- -- --
Max.
-- -- -- -- -- -- -- 15 -- -- --
Max.
-- -- -- -- -- -- -- 20 -- -- --
Max.
-- -- -- -- -- -- -- 25 -- -- --
Unit
ns ns ns ns ns ns ns ns ns ns ns
V62C5181024 Rev. 2.2 February 2000
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MOSEL VITELIC
Switching Waveforms (Read Cycle)
Read Cycle 1(1, 2)
tRC ADDRESS tAA OE tOE tOLZ I/O tOH
V62C5181024
tOHZ(5)
5181024 09
Read Cycle 2(1, 2, 4)
tRC ADDRESS tAA tOH I/O
5181024 10
tOH
Read Cycle 3(1, 3, 4)
ADDRESS
CE1 tACS1 CE2 tACS2 tCLZ1(5) tCLZ2(5)
5181024 11
tCHZ(5)
I/O
NOTES: 1. WE = VIH. 2. CE1 = VIL and CE2 = VIH. 3. Address valid prior to or coincident with CE1 transition LOW and/or CE2 transition HIGH. 4. OE = VIL. 5. Transition is measured 500mV from steady state with CL = 5pF. This parameter is guaranteed and not 100% tested.
V62C5181024 Rev. 2.2 February 2000
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MOSEL VITELIC
Switching Waveforms (Write Cycle)
Write Cycle 1 (WE Controlled)(4)
tWC ADDRESS
V62C5181024
tWR(2) tCW CE1 tAW CE2 tAS WE tWP(1) OUTPUT tWHZ INPUT
5181024 12
(6)
tCW(6)
tDW
tDH
Write Cycle 2 (CE Controlled)(4)
tWC ADDRESS tCW(6) CE1 tAW CE2 tAS WE High-Z tDW INPUT
5181024 13
tWR(2)
(4)
tCW(6)
OUTPUT
tDH
(5)
NOTES: 1. The internal write time of the memory is defined by the overlap of CE1 and CE2 active and WE low. All signals must be active to initiate and any one signal can terminate a write by going inactive. The data input setup and hold timing should be referenced to the second transition edge of the signal that terminates the write. 2. tWR is measured from the earlier of CE1 or WE going high, or CE2 going LOW at the end of the write cycle. 3. During this period, I/O pins are in the output state so that the input signals of opposite phase to the outputs must not be applied. 4. OE = VIL or VIH. However it is recommended to keep OE at VIH during write cycle to avoid bus contention. 5. If CE1 is LOW and CE2 is HIGH during this period, I/O pins are in the output state. Then the data input signals of opposite phase to the outputs must not be applied to them. 6. tCW is measured from CE1 going low or CE2 going HIGH to the end of write.
V62C5181024 Rev. 2.2 February 2000
8
MOSEL VITELIC
Package Diagrams
32-Pin 600 mil Plastic DIP
1.660 MAX. [42.16 MAX.] 15 MAX
V62C5181024
INDEX-1 EJECTOR MARK 0.545-0.555 [13.84-14.10] INDEX-2 0.600 TYP [15.24 TYP]
0.050 [1.27] MAX
0.010 [0.254] MIN
+0.004 -0.0004 0.254 +0.102 -0.010 0.010
0.210 [5.33] MAX 0.120 [3.05] MIN 0.100 [2.54] TYP +0.012 .047 -0 +0.305 1.19 -0 +0.012 -0 +0.305 0.813 -0 0.032
Units in inches [mm]
+0.006 0.018 -0.002 +0.152 0.457 -0.051
32-Pin 440 mil SOP (525 mil pin-to-pin)
0.822 [20.88] MAX. 0-8
Units in inches [mm]
0.450 0.008 [11.43 0.203]
0.556 0.012 [14.12 0.305]
0.525 [13.34] MAX.
0.031 0.008 [0.787 0.203]
0.050 [1.27]
0.018 0.004 [0.457 0.102] 0.108 0.008 [2.74 0.203] 0.806 0.008 [20.47 0.203] 0.118 [3.00] MAX.
0.008
+0.004 -0.002
0.098 [2.50] MAX
0.10 [2.54] MAX. 0.002 [0.051] MAX. 0.004 [0.102] MAX.
0.028 [0.711]
V62C5181024 Rev. 2.2 February 2000
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MOSEL VITELIC
Package Diagrams (Cont'd)
32-Pin TSOP (Standard)
V62C5181024
Units in inches [mm] 0.787 0.008 [19.99 0.203]
Detail "A"
0.315 TYP. (0.319 MAX.) 8.00 TYP. (8.10 MAX.)
0.010 [.254]
0.724 TYP. (0.728 MAX.) [18.39 TYP. (18.49 MAX)]
0.024 0.004 [0.610 0.102]
0.035 0.002 [0.889 0.051] SEATING PLANE See Detail "A" 0.005 MIN. 0.007 MAX. 0.127 MIN. 0.178 MAX. 0.032 [0.813] TYP. 0.020 [0.508] MAX. 0.020 [0.508] SBC 0.003 [0.076] MAX. 0.009 0.002 [0.229 0.051] 0.047 [1.19] MAX.
V62C5181024 Rev. 2.2 February 2000
10
MOSEL VITELIC
Notes
V62C5181024
V62C5181024 Rev. 2.2 February 2000
11
MOSEL VITELIC
U.S.A.
3910 NORTH FIRST STREET SAN JOSE, CA 95134 PHONE: 408-433-6000 FAX: 408-433-0952
WORLDWIDE OFFICES
TAIWAN
7F, NO. 102 MIN-CHUAN E. ROAD, SEC. 3 TAIPEI PHONE: 886-2-2545-1213 FAX: 886-2-2545-1209 NO 19 LI HSIN RD. SCIENCE BASED IND. PARK HSIN CHU, TAIWAN, R.O.C. PHONE: 886-3-579-5888 FAX: 886-3-566-5888
V62C5181024
UK & IRELAND
SUITE 50, GROVEWOOD BUSINESS CENTRE STRATHCLYDE BUSINESS PARK BELLSHILL, LANARKSHIRE, SCOTLAND, ML4 3NQ PHONE: 01698-748515 FAX: 01698-748516
SINGAPORE
10 ANSON ROAD #23-13 INTERNATIONAL PLAZA SINGAPORE 079903 PHONE: 65-3231801 FAX: 65-3237013
HONG KONG
19 DAI FU STREET TAIPO INDUSTRIAL ESTATE TAIPO, NT, HONG KONG PHONE: 852-2666-3307 FAX: 852-2770-8011
JAPAN
WBG MARIVE WEST 25F 6, NAKASE 2-CHOME MIHAMA-KU, CHIBA-SHI CHIBA 261-7125 PHONE: 81-43-299-6000 FAX: 81-43-299-6555
GERMANY (CONTINENTAL EUROPE & ISRAEL)
71083 HERRENBERG BENZSTR. 32 GERMANY PHONE: +49 7032 2796-0 FAX: +49 7032 2796 22
U.S. SALES OFFICES
NORTHWESTERN
3910 NORTH FIRST STREET SAN JOSE, CA 95134 PHONE: 408-433-6000 FAX: 408-433-0952
SOUTHWESTERN
302 N. EL CAMINO REAL #200 SAN CLEMENTE, CA 92672 PHONE: 949-361-7873 FAX: 949-361-7807
CENTRAL, NORTHEASTERN & SOUTHEASTERN
604 FIELDWOOD CIRCLE RICHARDSON, TX 75081 PHONE: 972-690-1402 FAX: 972-690-0341
(c) Copyright 2000, MOSEL VITELIC Inc.
2/00 Printed in U.S.A.
The information in this document is subject to change without notice. MOSEL VITELIC makes no commitment to update or keep current the information contained in this document. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of MOSEL-VITELIC.
MOSEL VITELIC subjects its products to normal quality control sampling techniques which are intended to provide an assurance of high quality products suitable for usual commercial applications. MOSEL VITELIC does not do testing appropriate to provide 100% product quality assurance and does not assume any liability for consequential or incidental arising from any use of its products. If such products are to be used in applications in which personal injury might occur from failure, purchaser must do its own quality assurance testing appropriate to such applications.
MOSEL VITELIC
3910 N. First Street, San Jose, CA 95134-1501 Ph: (408) 433-6000 Fax: (408) 433-0952 Tlx: 371-9461

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